Simulation, test bench and hardware-in-the-loop validation

About ASW Open R&D Internship Challenge

Africa Space Works is opening a hands-on internship challenge for students and early-career engineers who want to work on demanding space software, embedded systems, FPGA and AI problems. The program is built around practical engineering: internal repositories, cloud workspaces, selected FPGA cards, remote or office participation, weekly delivery discipline, and monthly technical reviews.

The common challenge is to build a safe test bench for a real-time camera-based tracking system. The system will use camera input, computer vision, FPGA and embedded processing, measurable validation, and controlled actuator-style outputs to detect and follow small moving targets in a controlled environment.

All tracks are connected. Track A enables execution, Track B proves performance, Track C builds the real-time hardware pipeline, and Track D builds the computer vision and AI tracking layer.

Role Overview - Track B: Simulation, Test Bench and Hardware-in-the-Loop Validation

As an intern on Track B, your goal is to transform engineering work into measurable evidence. You will own the repeatable validation flow: simulated targets, replayed camera data, test videos, regression checks, hardware-in-the-loop experiments, report parsing, and verification gates.

This track is central to the challenge. The team must be able to say whether the tracking system is improving or not, using objective metrics such as latency, detection rate, false positives, missed targets, tracking stability, reproducibility and hardware readiness.

Key Responsibilities

• Create and maintain a repeatable test flow for the camera-based tracking system.
• Build simulation scripts, replay pipelines, synthetic target scenarios, and controlled test cases.
• Develop automated report parsing, regression checks, dashboards, and verification gates.
• Measure latency from camera input to FPGA/embedded decision and controlled output.
• Define acceptance criteria for detection quality, tracking stability, false positives, missed targets, and experiment reproducibility.
• Work closely with Track D to evaluate computer vision and AI tracking performance.
• Work closely with Track C to validate FPGA pipelines, board behavior, hardware interfaces, and hardware-in-the-loop runs.
• Publish weekly objectives, push daily useful traces (commits, tests, notes), and present concrete evidence at weekly integrations.

Requirements

• Strong technical baseline in software testing, simulation, continuous integration and measurable validation.
• Good working knowledge of Python.
• Willingness to learn and use shell scripting, Rust and C when needed for automation, test harnesses, low-level tools or hardware integration.
• Interest in hardware-in-the-loop testing, video replay, experiment design, metrics and reliability engineering.
• Ability to work effectively with internal repositories and maintain clear documentation.
• Passion for testing discipline, engineering proof, and measurable technical progress.
• Ability to communicate effectively and collaborate interdependently with other engineering tracks.

Selection, Prize, and Hiring

• Fast Selection: CV screening, technical task, and interview.
• Cash Prize: Top contributors generating reproducible, integrated, and high-quality reusable engineering output may be awarded a cash prize.
• Hiring Path: The best profiles demonstrating strong technical judgment and integration skills may be offered full-time or longer-term roles at ASW.